RISC-V: the potential of open processor architecture


The interest in RISC-V brings together such diverse companies and institutions as Google, Russian arms manufacturers, the NSA, Chinese intelligence, blockchain chip manufacturers, underfunded universities and European supercomputer researchers. Some want to save royalties, develop other new processor technology, yet others are looking for secure chips without backdoors. RISC-V promises to meet such requirements and is hotly debated by CPU experts – although there are very few RISC-V chips available. The following overview shows what makes the RISC-V technology so attractive and where it should be used.

Unlike many established processor families, RISC-V is not optimized for a typical application – for example, only for large servers or for tiny microcontrollers – but extremely flexible. The simplest 32-bit implementation of the RV32I can do with a few milliwatts for a highly secure smart card controller, while the strongest 64-bit versions in KI computing accelerators for supercomputers stuck. In addition, RISC-V is particularly easy to expand and has a cleverly chosen license model for commercial use. Therefore, extremely financially strong companies jumped on the RISC-V-train and give it powerful boost: cloud giants like Amazon, Google, Facebook, Microsoft and Alibaba develop their own special chips. You can afford high-caliber development teams that deliver results quickly.

State-funded research teams from countries such as China, Russia and India are also playing a major role in RISC-V. These countries want to reduce their dependency on Western chip technology: on the one hand for economic reasons, on the other hand to avoid backdoors of foreign intelligence services. The latter also makes RISC-V interesting for Western intelligence services as well as for use in critical infrastructures (KRITIS) and weapon systems. The potentially higher security of a fully disclosed and therefore "verifiable" chip is also attractive to banks, fintech companies and developers of blockchain hardware.

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